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they lack, however, the ability to discern where (i.e., in which units) the power dissipation is
most or least prominent. Such per-unit power attribution is useful both for guiding power-
efficient design optimizations, as well as for guiding thermal models of on-chip hotspots. For
example, a total power estimate will merely tell me if I am near or exceeding the overall chip
power budget or thermal capacity; it cannot tell me about whether I have one particular hotspot
on the chip that is nearing its local thermal limit.
Accurate and efficient per-unit power estimators can be built by exploiting the specific
hardware performance counters provided on nearly all high-performance microprocessors today.
For example, Isci and Martonosi demonstrated an accurate counter-based estimator for the Intel
Pentium 4 chips [ 114 ]. In this work, rather than aiming to provide a single total power estimate,
they instead selected 22 physical hardware blocks from a die photo, and aimed to estimate the
power of each of these units individually. Such floorplan-based per-unit estimates can be used
to drive long-running thermal studies. For a particular hardware unit i , the power estimate is
expressed as:
Power ( i )
=
AccessRate ( i )
×
ArchitecturalScaling ( i )
×
MaxPower ( i )
+
NonGatedPower ( i )
.
AccessRate can be measured or deduced via hardware performance counters. The other
factors are determined by measurements using a set of benchmarks designed to isolate and
exercise units of the hardware as independently as possible. Overall, for a wide variety of both
SPEC benchmarks and desktop applications, their approach offers accuracy to within 2-4 W
over the full operating range (roughly 5-55 W) of the Pentium 4 implementation they studied.
2.4.2 Imaging and Other Techniques
In recent years, interesting direct methods for measuring chip activity have emerged based on
imaging technology. We briefly discuss these approaches here.
Thermal imaging : The central observation that drives this class of measurement techniques
is that the thermal behavior of a running microprocessor can be observed, under the right
conditions, as infrared (IR) radiation [ 91 , 165 ]. The keys to such setups are in creating a system
in which: (i) the observations can be made on a running chip and (ii) the infrastructure required
to image the chip does not excessively perturb the running system.
The massive heatsinks currently used on microprocessors are clearly not infrared trans-
parent. In addition, since they spread the heat the microprocessor gives off, they make it
impossible to attribute hot spots in the IR image to particular localized hardware units. To
prepare a chip for thermal measurements based on IR imaging, the chip must be operated
without a conventional heat sink. Since this would normally cause the chip either to shut down
(we hope!) or to malfunction (we fear!), an alternative method of cooling must be used. This
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