Modeling, Simulation, and Measurement - Computer Architecture Techniques for Power-Efficiency - page 21

alternative cooling is normally provided by pumping a liquid that is infrared transparent (such
as mineral oil) over the microprocessor.
In addition to providing dynamic cooling for the chip, the measurements also can benefit
if the chip can be thinned in order to provide a more direct imaging path to the active silicon
layer. That is, due to the bonding techniques typically used today, the active silicon layer lies
face down in the socket, with the thicker silicon wafer material above it. Thinning down this
material allows the chip to still function while allowing the imaging equipment to capture the
heating effects without spreading.
Power estimates from thermal images : Previously, we described a methodology in which
hardware performance counters first drove a power measurement from which some thermal
estimates could be deduced. Here, an opposite approach applies. Namely, from the thermal
imaging techniques just described, one can garner good still photos or videos of running chips
in which the color of the IR image corresponds to temperature. One can provide an intuitive or
qualitative sense of hotspots simply by overlaying these IR images with a floorplan of the chip:
units that are chip hotspots will be colored red [ 91 , 165 ].
From these IR images, one can also provide more quantitative data regarding chip tem-
peratures and power dissipation. For example, if there are small on-chip digital thermometers,
then one can calibrate between thermal readings at a particular point on the chip versus the
detailed image data for that point on the chip. Such calibrations allow one to provide image
processing filters that calibrate the camera and the setup to provide accurate absolute (not
simply relative) temperature data.
In addition, one can back-calculate from this temperature to deduce the per-unit power
dissipation that must have led to them. For example, Mesa-Martinez et al. used an “inverse
heat transfer” solution based on genetic algorithms to “match” the collected thermal images
back to a consistent model for how per-unit power dissipation must have varied in order to
produce those images [ 165 ].
2.5 SUMMARY
Overall, this chapter has provided an introduction to the aspects of CMOS power consumption
that are relevant to computer architecture in current and next-generation designs. By summa-
rizing metrics, models, and simulation techniques, we have offered the groundwork from which
subsequent chapters can discuss power optimization techniques themselves.