Modeling, Simulation, and Measurement - Computer Architecture Techniques for Power-Efficiency - page 19

Measuring total system power is, in fact, not particularly challenging. Data acquisition
systems or even simple ammeters can be used to collect such aggregate numbers. Likewise,
coarse-grained thermal measurements are also possible, by using software to read the on-die
temperature sensor that is sometimes made available to software [ 196 ].
Challenges do exist, however, in using real-system measurements to glean deeper in-
formation about system behavior. For example, consider the deceptively simple-looking task
of apportioning dynamic power into components that correspond to different hardware units
on the die. While off-chip ammeters can be used to deduce how much total power the chip
dissipates, there is no straightforward approach for users to determine a unit-by-unit power
breakdown. To respond to this challenge, Section 2.4.1 discusses a method in which hard-
ware performance counters are used as proxies for on-chip activity factors, in order to estimate
component-level power dissipation. The section then extends on this technique to show how
it can be used for thermal estimates as well.
2.4.1 Performance-Counter-based Power and Thermal Estimates
In essence, the simulation-based power estimators discussed earlier in this chapter use various
approaches to estimate capacitance, and then use cycle-level simulators to estimate the “activity
factors” indicating how often wires switch from zero to one or vice versa. Such approaches are
appealing because they allow power estimation before a system is built, and because they allow
one to explore parameter trade-offs to determine power's dependence on design choices.
As an alternative to simulation, recent work has proposed methods for estimating activity
factors from hardware performance counters on live running systems [ 62 , 114 , 119 ]. Like
simulation, such methods still draw on other estimations for capacitance and voltage. The key
is that hardware performance counters can often serve as very accurate proxies for activity factor.
If one's goal is to measure aggregate power dissipation averaged over several cycles, then
aggregate performance counters, such as instructions-issued-per-cycle, may offer surprisingly
good estimations with few counters required. For example, Fan et al. used such IPC estimates to
guide aggregate provisioning decisions in data centers [ 74 ]. Joseph and Martonosi used an early
version of such techniques to estimate power on an Intel Pentium Pro microprocessor [ 119 ]. For
subsequent microprocessors in which clock gating (and other techniques) mean more widely
varying power, these approaches needed to be refined in terms of how individual performance
counters were weighted and summed to provide an overall power estimate. Contreras and
Martonosi describe one such approach with offline linear estimates created based on specially
written benchmarks [ 62 ].
The techniques described above set up a relationship between total power and a sum of
performance-counter-provided activity factors, each weighted to generate accurate total power
values. While such approaches are good for tracking aggregate power as it varies in real time,