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account for the respective active and reactive power at fundamental frequency.
Load admittance at kth load level is given as
1
w i
j Q ik
n
y l ik ¼
P ik
ð
9
Þ
2
V ik
where w i is the percentage of load at bus
.
The overall voltage at any bus i, at harmonic frequency, is evaluated as
'
i
'
t
X
N
2
V ik
V i j j¼
ð
10
Þ
n ¼ 1
where,
V ik
nth harmonic voltage at bus i at load level k
N
Maximum harmonic order under consideration.
The amount of distortion in the system is calculated based on Total Harmonic
Distortions (THD), given as,
s
P
V
2
V ik
n 1
THD ik ð % Þ¼
100
ð
11
Þ
V ik
3.2 Load Variation
To take into account the varying load conditions and to calculate the energy loss at
these load conditions, load levels are considered for time duration
'
T i '
. These load
levels are assumed discrete, as shown in Fig. 5 . The load levels are assumed to be a
piece-wise linear function of time period, T, which is again divided into intervals
during which the load level remains constant. The load levels are divided into three
categories, peak, medium, and low.
3.3 Planning Methods
To solve the capacitor placement problem using soft computing techniques the
problem is modelled as objective function termed as planning methods. Similar
objective functions are applicable for the placement using the analytical, numerical,
soft computing techniques. The planning methods used for the capacitor placement
are discussed below.
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