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TABLE 10.3 RISC Versus CISC Performance
MIPS CPI
(RISC)
VAX CPI
(CISC)
CPI
ratio
Instruction
ratio
Application
Spice 2G6
1.80
8.02
4.44
2.48
Matrix300
3.06
13.81
4.51
2.37
Nasa 7
3.01
14.95
4.97
2.10
Espresso
1.06
5.40
5.09
1.70
the number of CPU registers could very much improve the performance of a CISC
machine. This could be the reason behind not finding a pure commercially available
RISC (or CISC) machine. It is not unusual to see a RISC machine with complex
floating-point instructions (see the details of the SPARC architecture in the next sec-
tion). It is equally expected to see CISC machines making use of the register win-
dows RISC idea. In fact there have been studies indicating that a CISC machine
such as the Motorola 680xx with a register window will achieve a 2 to 4 times
decrease in the memory traffic. This is the same factor that can be achieved by a
RISC architecture, such as the Berkeley RISC, due to the use of a register window.
It should, however, be noted that most processor developers (except for Intel and
its associates) have opted for RISC processors. Computer system manufacturers
such as Sun Microsystems are using RISC processors in their products. However,
for compatibility with the PC-based market, such companies are still producing
CISC-based products.
Tables 10.3 and 10.4 show a limited comparison between an example RISC and
CISC machine in terms of performance and characteristics, respectively.
An elaborate comparison among a number of commercially available RISC and
CISC machines is shown in Table 10.5.
It is worth mentioning at this point that the following set of common character-
istics among RISC machines is observed:
1. Fixed-length instructions
2. Limited number of instructions (128 or less)
3. Limited set of simple addressing modes (minimum of two: indexed and
PC-relative)
4. All operations are performed on registers; no memory operations
5. Only two memory operations: Load and Store
TABLE 10.4 RISC Versus CISC Characteristics
VAX-11
(CISC)
Berkeley RISC-1
(RISC)
Characteristic
Number of instructions
303
31
Instruction size (bits)
16-456
32
Addressing modes
22
3
No. general purpose registers
16
138
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