Input–Output Design and Organization - Fundamentals of Computer Organization and Architecture - page 174

TABLE 8.3 The AITC Registers

Register Description

INTCNTL Configures specific control functions of the AITC.

NIMASK Controls the Normal interrupt mask level. All Normal interrupt

priority levels at or below what is programmed in the NIMASK
register will be masked. Normal interrupt priorities are
programmed via the NIPRIORITY[7 : 0] registers.

INTENNUM Provides hardware accelerated enabling of interrupts. This is done by

programming this register with the interrupt source that is desired
to be enabled. Doing so will immediately enable (set) this interrupt
source bit in the INTENABLEH / L register.

INTDISNUM Provides hardware accelerated disabling of interrupts. This is done

by programming this register with the interrupt source that is
desired to be disabled. Doing so will immediately disable (clear)
this interrupt source bit in the INTENABLEH / L register.

INTENABLEH Used to enable pending interrupt source bits [63-32] to the core.

INTENABLEL Used to enable pending interrupt source bits [31-0] to the core.

INTTYPEH Used to select whether an enabled and pending interrupt source bit

[63-32] will create a Normal interrupt or Fast interrupt to the core.

INTTYPEL Used to select whether an enabled and pending interrupt source bit

[31-0] will create a Normal interrupt or Fast interrupt to the core.

NIPRIORITY[7 : 0] Provides software prioritization of Normal interrupts.

NIVECSR Provides the priority of the highest pending Normal interrupt and

provides the source number of the highest pending Normal interrupt.

FIVECSR Provides the source number of the highest pending Fast interrupt.

INTSRCH Reflects the status of interrupt request inputs (sources 63-32) into

the interrupt controller.

INTSCRL Reflects the status of interrupt request inputs (sources 31-0) into the

interrupt controller.

INTFRCH Allows for software generation of interrupts for interrupt sources 63

through 32.

INTFRCL Allows for software generation of interrupts for interrupt sources 31

through 0.

NIPNDH Reflects the source number(s) of pending Normal interrupt requests,

for interrupt sources 63 through 32.

NIPNDL Reflects the source number(s) of pending Normal interrupt requests,

for interrupt sources 31 through 0.

FIPNDH Reflects the source number(s) of pending Fast interrupt requests, for

interrupt sources 63 through 32.

FIPNDL Reflects the source number(s) of pending Fast interrupt requests, for

interrupt sources 31 through 0.