Memory System Design I - Fundamentals of Computer Organization and Architecture - page 109

TABLE 6.1 Memory Hierarchy Parameters

Access type Capacity Latency Bandwidth Cost / MB

CPU registers Random 64-1024 bytes 1-10 ns System clock

rate

High

Cache memory Random 8-512 KB 15-20 ns 10-20 MB / s $500

Main memory Random 16-512 MB 30-50 ns 1-2 MB / s $20-50

Disk memory Direct 1-20 GB 10-30 ms 1-2 MB / s $0.25

Tape memory Sequential 1-20 TB 30-10,000 ms 1-2 MB / s $0.025

phenomenon that when a given address has been referenced, it is most likely that
addresses near it will be referenced within a short period of time, for example, consecu-
tive instructions in a straightline program. Temporal locality, on the other hand, refers
to the phenomenon that once a particular memory item has been referenced, it is most
likely that it will be referenced next, for example, an instruction in a program loop.
The sequence of events that takes place when the processor makes a request for an
item is as follows. First, the item is sought in the first memory level of the memory
hierarchy. The probability of finding the requested item in the first level is called
the hit ratio, h 1 . The probability of not finding (missing) the requested item in the
first level of the memory hierarchy is called the miss ratio,(1

2 h 1 ). When the
requested item causes a “miss,” it is sought in the next subsequent memory level.
The probability of finding the requested item in the second memory level, the hit
ratio of the second level, is h 2 . The miss ratio of the second memory level is
(1

h 2 ). The process is repeated until the item is found. Upon finding the requested
item, it is brought and sent to the processor. In a memory hierarchy that consists of
three levels, the average memory access time can be expressed as follows:

t av ¼ h 1 t 1 þ (1 h 1 ) ½ t 1 þ h 2 t 2 þ (1 h 2 )(t 2 þ t 3 )

¼ t 1 þ (1 h 1 ) ½ t 2 þ (1 h 2 )t 3

The average access time of a memory level is defined as the time required to access
onewordinthatlevel.Inthisequation,t 1 , t 2 , t 3 represent, respectively, the access
times of the three levels.

6.2. CACHE MEMORY

Cache memory owes its introduction to Wilkes back in 1965. At that time, Wilkes
distinguished between two types of main memory: The conventional and the slave
memory. In Wilkes terminology, a slave memory is a second level of unconventional
high-speed memory, which nowadays corresponds to what is called cache memory
(the term cache means a safe place for hiding or storing things).
The idea behind using a cache as the first level of the memory hierarchy is to keep
the information expected to be used more frequently by the CPU in the cache