Memory System Design I - Fundamentals of Computer Organization and Architecture - page 108

semiconductor material (typically CMOS transistors). It is customary to call the fast
memory level the primary memory. The solid-state memory is followed by larger, less
expensive, and far slower magnetic memories that consist typically of the (hard) disk
and the tape. It is customary to call the disk the secondary memory, while the tape is con-
ventionally called the tertiary memory. The objective behind designing a memory hier-
archy is to have a memory system that performs as if it consists entirely of the fastest unit
and whose cost is dominated by the cost of the slowest unit.
The memory hierarchy can be characterized by a number of parameters. Among these
parameters are the access type, capacity, cycle time, latency, bandwidth,andcost.The
term access refers to the action that physically takes place during a read or write oper-
ation. The capacity of a memory level is usually measured in bytes. The cycle time is
defined as the time elapsed from the start of a read operation to the start of a subsequent
read. The latency is defined as the time interval between the request for information and
the access to the first bit of that information. The bandwidth provides a measure of the
number of bits per second that can be accessed. The cost of a memory level is usually
specified as dollars per megabytes. Figure 6.1 depicts a typical memory hierarchy.
Table 6.1 provides typical values of the memory hierarchy parameters.
The term random access refers to the fact that any access to any memory location
takes the same fixed amount of time regardless of the actual memory location and or

the sequence of accesses that takes place. For example, if a write operation to
memory location 100 takes 15 ns and if this operation is followed by a read oper-
ation to memory location 3000, then the latter operation will also take 15 ns. This
is to be compared to sequential access in which if access to location 100 takes
500 ns, and if a consecutive access to location 101 takes 505 ns, then it is expected
that an access to location 300 may take 1500 ns. This is because the memory has to
cycle through locations 100 to 300, with each location requiring 5 ns.
The effectiveness of a memory hierarchy depends on the principle of moving
information into the fast memory infrequently and accessing it many times before
replacing it with new information. This principle is possible due to a phenomenon
called locality of reference; that is, within a given period of time, programs tend
to reference a relatively confined area of memory repeatedly. There exist two
forms of locality: spatial and temporal

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locality. Spatial locality refers to the

CPU Registers

Cache

Latency

Main Memory

Bandwidth

Secondary Storage (Disk)

Speed
Cost per bit

TertiaryStorage (Tape)

Capacity (megabytes)

Figure 6.1 Typical memory hierarchy