A Novel Design Methodology for High Tuning Linearity and Wide Tuning Range Ring Voltage Controlled Oscillator - VLSI Design and Test - page 17

5 Conclusion

In this paper a novel design methodology of a CMOS current starved ring Voltage
Controlled Oscillator (VCO) for wide tuning range and high linearity has been
achieved. The f-V tuning characteristic of the ring VCO depends on the current-
voltage (I bias -V control ) characteristic of the replica bias and region of operation of
current source/sink transistors (CSTs). The proposed design methodology linearizes
the I bias -V control characteristic and ensures the CSTs to operate in saturation region.
Consequently, tuning range is enhanced without additional circuitry and thus,
reducing the power consumption and area of the CSVCO. The design is implemented
in UMC 0.18 µm CMOS technology at 1.8 V supply voltage. The overall circuit
consumes 260 µW power at 404.5 MHz, has a wide tuning range of 66 MHz to 875
MHz and having 94.5% tuning linearity. The post-layout extraction simulation results
closely match with the schematic simulation results.

Acknowledgement. The authors would like to thank Dr. Chandra Shekhar, Director,
CSIR-CEERI, Pilani for his constant guidance and support. The authors also thank
DeitY/MCIT, New Delhi for project sponsorship and support.

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