A Methodology for Early and Accurate Analysis of Inrush and Latency Tradeoffs during Power-Domain Wakeup - VLSI Design and Test - page 298

Fig. 4. Schematic circuit for domain-switching

5 Simulation

To make the model in figure above simulate-able in a circuit-simulator (like
SPICE), we need to create a equivalent-circuit model for the logic-gates G S and
G AON . The simplest model is a lumped capacitance whose value is estimated by
multiplying the gate-count with a per-gate capacitance number, which in turn is
derived by simulating simple gates. However this approach does not take into
account several factors. First: logic-gates do not act as linear capacitors since the
charge to voltage ratio varies with the voltage. Second: logic-charging may display
significant short-circuit currents, not modeled by capacitors. Third: the effect of
standard-cells being arranged in chains is also not captured by lumped capacitors.
Thus lumped-cap models would-be an over-simplification and the results from
those are not likely to be accurate at all. On the other hand, it is highly impractical
to try to simulate a complete design-netlist in a circuit simulator, even if such a
netlist is available at the early analysis stage.
As a middle-ground, we use multiple-instances of a standard-cell-chain as a more
accurate model of logic in a domain. This may be a chain of randomly-picked logic
gates, or (for simplicity) a chain of basic NAND2 gates may be used. For example if
a chain of K nand-gates is used then, the GS Logic gates can be modeled by G S /K
instances of the nand-chain. Similarly the Already-On logic can be modeled by G AO /K
instances of the nand-chain. This is shown in Fig 5 below.
For a real design, this number of instances can still be too high to simulate in SPICE
(or similar circuit-simulator) in any reasonable amount of time. To resolve this issue,
a further simplification may be made with no loss of accuracy. The whole
circuit of fig. 5 is “divided by” N PS as shown in fig. 6 below. (When doing this, it is
important to note that while on one hand the instance counts of switches and nand-
chains as well as capacitance-value shall be divided by N PS , on the other hand the
resistor and inductor values should be multiplied by N PS .) Now, the circuit has only