A Methodology for Early and Accurate Analysis of Inrush and Latency Tradeoffs during Power-Domain Wakeup - VLSI Design and Test - page 299

Fig. 5. Equivalent circuit for simulations
one switch-cell, as well as a drastically-reduced transistor-count. This helps make the
SPICE simulation practical on a normal computing-machine.
Fig. 6. Reduced Equivalent circuit for faster simulations
This circuit can now be simulated, by initializing the capacitance to the voltage
before the domain switching, then closing the switch by switching the control-input of
the switch-cell, and observing the transient response. The voltage-waveforms
obtained from this circuit will be same as for the original circuit of fig. 5, while the
current will have to ne multiplied by a factor of N PS to get the actual value. Further,
the current-waveform from this simulation can be input to LDO-simulation, to
achieve a complete response including recovery to full rail voltage. This is
demonstrated in the section below.