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Table 2. Standard Deviation, CPK & Yield relationship
Sl
No
Standard
Deviation
Yield
/ppm (%)
CPK
1
3
1
99.73
2
4
1.33
99.9936
3
6
2
99.9999
The relation between CPK and yield/part-per-million (ppm) is given below -
4
Derivation of Parallel Hardware Specification Based on CPK
CPK is calculated by knowing mean value of measured data, USL & LSL and stan-
dard deviation of measured data as mentioned in Fig.3. To get the mean value of
measured data ( ) for required CPK, one should know USL, LSL & standard devia-
tion. There are two cases for deriving parallel hardware specification of any peripher-
al. One specification, for example, input setup time, should have value less than that
specified in hardware specification document. For this case, USL should be taken for
calculation of mean value of data. And the other specification should have value more
than that specified in hardware specification document. In this case, LSL should be
taken for calculation of mean value of data. Here, is taken from previous Si of
same technology node when tested on ATE VERIGY 93K ATE [13]. Following are
examples for calculating mean of data:
Case1: Input setup time calculation for CPK of 2.
Input setup t NIVKH (USL) =5ns
Targeted CPK = 2
Standard Deviation (
) = 0.19 (for e.g.)
CPK = (USL -
)/3*
= 3.85 ns
Therefore, targeted Design specification of input setup to meet CPK of 2 is 3.85ns.
Case2: Output hold time calculation for CPK of 2.
Output hold time t NIKHOX2 (LSL) = 0ns
Targeted CPK = 2
Standard Deviation (
) = 0.19 (for e.g.)
CPK = (
- LSL)/3*
= 1.14 ns
Therefore, targeted design specification of output hold time to meet CPK of 2
should be taken as 1.14ns.
For Output hold time t NIKHOV2 (USL) = 6ns
Targeted CPK = 2
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