Baseband Hardware Designs in Modernised GNSS Receivers - Global Navigation Satellite Systems: Signal,Theory and Applications - page 38

An R -arm correlator will have 2 R accumulators (due to the in-phase and quadrature

carrier components) and hence accumulator width plays a very important role in correlator
complexity. Some correlators use re-sampling prior to the local reference mixer stage (e.g.
(Namgoong et al., 2000)), to reduce the number of samples input to the accumulator. However
those special techniques are outside the scope of the discussion here.

(

C

+

1

)

2.4 Efficient realisation of the correlator core for the GPS L1 C/A signal

As mentioned in the previous section, the input to the correlator is the sampled IF signal.
Each sample in the sampled IF signal, when mixed with local carrier and the local reference
signal, produces a correlation value (“sample correlation value”) which is then fed to the
accumulator. Therefore, in the correlator core of Fig. 2, all the blocks do not require sequential
logic. The carrier mixer, subcarrier modulation and the local reference mixer are typically
implemented as combinational logic. Latching the input signal, carrier NCO, code NCO and
the accumulator are implemented as sequential logic. As a result, the combined propagation
delay of all the combination logic blocks should be less than the sampling period t pd + t acc

su

<

1/ f s , where t pd is the propagation delay and t acc

su is the setup time of the accumulator.
The combinational block has to compute the sample correlation value from the three inputs
viz. the incoming signal, the local carrier and the local reference signal. The carrier mixer
and the local reference mixer can be realised using Look-Up-Tables (LUTs) separately or
together. For the single-bit reference signals, the circuit can be further simplified by feeding
the local code to select the add or subtract operation of the accumulator. Fig. 3(a) shows a
generic way to realise the correlation computation blocks' combinational logic. The number
of instantiations of each block is mentioned above the block. Observe that two carrier mixer
blocks are required (I and Q), six reference signal mixer blocks are required (early, prompt and
late version of reference signals mixed with I and Q carrier mixer outputs) and six accumulator
blocks are required for the complete operation.

Fig. 3(b) shows a realisation of the combinational logic using the LUT method for the GPS
L1 C/A signal. In Fig. 3, the input signal and the local carrier are assumed to be 2-bit
wide and the local reference signal (in this case only the local code) is 1-bit wide. Observe
that the sample correlation output is represented using four bits even though there are only
eight possible values. This is because the succeeding stage (which is the signed addition, a
part of the accumulation process) is an arithmetic operation and hence the sample correlation
values need to be represented in 2's complement format. The local code mixer is eliminated
by using the local code output as the Add/Sub selection input of the accumulator. The output
therefore consists of six correlation values: inphase-early, inphase-prompt, inphase-late,
quadrature-early, quadrature-prompt and quadrature-late. These correlation values are fed
to the tracking loops for further processing.

3. Impact of the signal structure on the core correlator architecture

This section analyses the impact of the change in certain parameters of the signal (due to the
structure of the new signals) on the architecture of the core correlator.