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A 2 -A 31
BE 0
BE 1
BE 2
BE 3
BE 0
BE 1
BE 2
BE 3
BE 0
BE 1
BE 2
BE 3
BE 0
A 2 -A 31
A 2 -A 31
A 2 -A 31
Figure A.6
Memory addressing
16 bits
16 bits
EAX
AH
AL
CS
SS
DS
EBX
BH
BL
ECX
CH
CL
EDX
DH
DL
ESI
SI
EDI
DI
EBP
BP
32 bits
Figure A.7
80386/80486 registers
A.3.4 Memory cache
DRAM is a relatively slow type of memory compared with SRAM. A cache memory can be
used to overcome this problem. This is a bank of fast memory (SRAM) that loads data from
main memory (typically DRAM). The cache controller guesses the data the processor re-
quires and loads this into the cache memory. If the controller guesses correctly then it is a
cache hit, else if it is wrong it is a cache miss (as illustrated in Figure A.8). A miss causes the
processor to access the memory in the normal way (that is, there may be wait states). Typical
cache memory sizes are 16 KB, 32 KB and 64 KB. This should be compared with the size of
the RAM on a typical PC which is typically at least 6 4 MB.
Many modern systems have extra cache memory added to improve the hit rate. Typically
an 8 KB cache memory gives 70 % hit rate, a 16 KB cache memory 85 %, a 32 K cache 93 %
and a 64 KB cache 95 %. Cache sizes above this do not significantly effect the hit rate and
can actually slow the process down as they take so long to fill the cache memory. The Intel
80486 and Pentium have built-in cache controllers and, at least, 8 KB of SRAM cache mem-
ory. Intel claim that this has a 96% hit rate, which is an extremely high hit rate for such a
small amount of cache memory.
 
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