Micro-programmed Adaptive Filtering Applications - Digital Design of Signal Processing Systems: A Practical Approach - page 471

11.6.2.6 Conditional Branch Instruction
LEC accelerator supports the following jump instructions:
if (Z) jump LABEL
if (N) jump LABEL
jump LABEL
The first two conditional branch instructions check the specified status flag and if the status flag is
set then themachine starts executingmicro-code stored in address specified as LABEL. The design of
the program sequencer for LEC accelerator is given in Figure 11.13.
11.6.2.7 Condition Multiplexer (C_MUX)
Conditional Multiplexer logic checks if the instruction is a conditional branch instruction and
accordingly set the conditional flag to the next address generation logic. The C_MUX implements
the logic in Table 11.1.
11.6.2.8 Next Address Logic
The Next Address Logic (NALogic) provides the address of the next instruction to be fetched from
Program Memory (PM). The block has the following inputs:
1. PC register: For normal program execution
2. Subroutine Return Address (SRA) register: This register keeps the return address of the last
subroutine called and this address is used once a return to subroutine is made.
3. LSA register: This register has the loop start address of the current loop and the address is used
once the loop count is not zero and the program executes the last instruction in the loop.
4. Branch Address Fields from IR: For branch instruction and subroutine calls the IR has
address of the next instruction. This address is used for instructions that execute a jump or
subroutine call.
The next address block implements the following logic
if (branch || call subroutine)
next_address = IR[branch address fields]
else if (instruction == return)
next_address = SRA
else if (PC == LEA && LC !=0)
next_address = LSA
else
next_address = PC;
11.6.2.9 Data Memories
The accelerator has two memories each consisting N kB. For defining rest of the memory related
fields in the current design, assume 8 kB of SRAM with 32-bit data bus. This makes 2048 memory
locations and 11-bit address is required to access any memory location. These fields accordingly