Chip Implementations - Heterogeneous Multicore Processor Technologies for Embedded Systems - page 134

800

1 Thread
2 Threads
4 Threads

600

400

200

Linux

0

FFT LU Radix Water

Fig. 4.11 Active power of SPLASH-2 suite

1000

750

2CPU Run + 2CPU Idle
2CPU Run + 2CPU Light Sleep
2CPU Run + 2CPU Sleep
2CPU Run + 2CPU Module Stop

500

250

0

600MHz 300MHz

Fig. 4.12 Energy consumption with low power modes

threads, respectively. The time should be 50% and 25% for ideal performance scal-
ability. The major overhead was synchronization and snoop time. The SNC improved
cache coherency performance, and the performance overhead by snoop transactions
was reduced up to 0.1% when SPLASH-2 was executed.
Figure 4.11 shows the power consumption of the SPLASH-2 suite. The suite ran
at 600 MHz and at 1.0 V. The average power consumption of one, two, and four
threads was 251, 396, and 675 mW, respectively. This included 104 mW of active
power for the idle tasks of SMP Linux. The results of the performance and power
evaluation showed that the power efficiency was maintained or enhanced when the
number of threads increased.
Figure 4.12 shows the energy consumption with low power modes. These modes
were implemented to save power when fewer threads were running than available
on CPU cores. As a benchmark, two threads of FFT were running on two CPU
cores, and two CPU cores were idle. The energy consumed in the light-sleep, sleep,
and module-stop modes at 600 MHz was 4.5%, 22.3%, and 44.0% lower than in the