General-Purpose DSP Processors - Signal Processing Systems - page 783

7 Multicore DSP Processors

As the complexity of DSP applications has been increasing over the years, there has
been trend to add parallelism to the processor's data path. For example, VLIW DSP
processors were introduced to add more arithmetic units in the data path. However,
performance requirements in many applications are beyond the capabilities of single
processors and, therefore, multicore DSPs have been developed.
An example of such multicores is TI TMS320C6678 [ 43 ] , which contains eight
C66x VLIW cores [ 41 ] and provides peak performance of 160 GMAC/s for floating-
point or 320 GMAC/s for fixed-point arithmetic with 1.25 GHz clock. The principal
block diagram reminds the TMC320C6670 illustrated in Fig. 8 . The eight cores,
DMA transfer controllers, and various system peripherals are interconnected with
TeraNet switch fabric. The cores have L1 caches for data and program, unified
L2 cache, and shared memory. In a similar fashion, Freescale MCS8156 [ 15 ]
contains Starcore SC3850 DSP cores interconnected with chip-level arbitration
and switching system, which provides arbitration between the cores, system level
shared memories, DDR SRAM controllers, and other system resources. Both these
multicore DSPs represent homogeneous multiprocessor systems.
Even larger number of cores can be found in Tilera provides TILE-Gx, TILEPro,
and TILE64 families of multicore processors, which contain 36 or 64 identical 64-
bit processors [ 6 ] . These processors are interconnected with a 2D mesh network.
HyperX HX3000 [ 22 ] by Coherent Logic contains a 10

× 10 array of processors

connected with a 11 11 array of data management and routing units (DMR)

as illustrated in Fig. 15 . Each processor can access four local memories in it's
neighbouring DMRs; one local memory block acts as a shared memory for four pro-
cessors. Multicore chips by Mindspeed Technologies are based on picoArray, which

×

Fig. 15 Principal organization of HX3000. DMR: Data management and routing unit