Software Compilation Techniques for MPSoCs - Signal Processing Systems - page 1193

by the semiconductor technology and, at the same time, matching the constraints
imposed by the embedded system market in terms of performance and power
consumption. Take a look at today's standard cell phone—it is integrated with a
great number of functions such as camera, personal digital assistant applications,
voice/data communications and multi-band wireless standards. Moreover, like many
other consumer electronic products, many non-functional parameters are evenly
critical for their successes in the market, e.g. energy consumption and form factor.
All those requirements necessitate the emerging of the heterogeneous MPSoC
architectures, which usually consist of programmable processors, special hardware
accelerators and efficient Networks on Chips (NoCs) and run a large amount of the
software, in order to catch up with the next wave of integration.
Compared with high-performance computing systems in supercomputers and
computer clusters, embedded computing systems require a different set of the
constraints that need to be taken into consideration in the design process:

￿ Real-time constraints : Real-time performance is key to the embedded devices

especially in the signal processing domain such as wireless and multimedia.
Meeting real-time constraints requires not only the hardware being capable of
meeting the demands of high-performance computations but also the predictable
behavior of the running applications.

￿ Energy-efficiency : Most handheld equipments are driven by batteries and energy-

efficiency is one of the most important factors during the system design.

￿ Area-efficiency : How to efficiently use the limited chip area becomes critical,

especially for the consumer electronics where portability is a must-to-have.

￿ Application/Domain-specific : Unlike general-purpose computing products, the

embedded products usually target at specific market segments, which in turn asks
for the specialization of the system design to tailor for specific applications.

With those design criteria mentioned, heterogeneous MPSoC architectures are
believed to outperform the previous uni-processor or homogeneous solutions. For
a detailed discussion on the architectures, the readers are referred to Chap. [ 15 ] .
MPSoC design methodologies, also referred as ESL (electronic system-level) tools,
are growing in importance to tackle the challenge of exploring the exploding design
space brought by the heterogeneity [ 59 ] . Many different tools are required for
completing a successful MPSoC design (or a series of MPSoC product genera-
tions, which is more often seen now in the industry e.g. Texas Instruments (TI)
OMAP [ 79 ] ). The MPSoC compiler is one important tool among those, which will
be discussed in detail in this chapter.
Firstly, what is an MPSoC Compiler ? Today's compilers are targeted to uni-
processors and the design and implementation of special compilers optimized for
the various processor types (RISC, DSP, VLIW, etc.) has been well understood
and practiced. Now, the trend moving to MPSoCs raises the level of complexity
of the compilers for utilizing MPSoCs. The problems of expressing parallelism in
applications' modeling/programming, and then mapping, scheduling and generating
the software to distribute on an MPSoC platform for efficient usage, remain largely
unaddressed [ 26 ] . We define MPSoC Compiler as the tool-chain to tackle those
problems for a given (pre-)verified MPSoC platform.