Software Compilation Techniques for MPSoCs - Signal Processing Systems - page 1194

It is worth mentioning that our definition of MPSoC compiler is subtly different
from the term software synthesis as it appears in the hardware-software co-
design community [ 30 ] . In this context, software synthesis emphasizes that starting
from a single high-level system specification, the tools perform hardware/software
partitioning and automatically synthesize the software part so as to meet the
system performance requirements of the specifications. The flow is also called an
application-driven “top-down” design flow. The MPSoC compiler is, however, used
mostly in the platform-based design, where the system and semiconductor suppliers
evolve the MPSoC designs in generations targeting a specific application domain for
the programmers to develop software. The function of an MPSoC compiler is very
close to that of a uni-processor compiler, where the compiler translates the high-
level programming language (e.g. C) into the machine binary code. The difference
is that an MPSoC compiler needs to perform additional (and much more complex)
jobs over the uni-processor one such as partitioning/mapping, in that the underlying
MPSoC machine is magnitudes more complex. Though software synthesis and
MPSoC compilers share some similarities (both generate code), the major difference
is that they exist in different methodologies' contexts, thus focusing on different
objectives. Please refer to [ 18 ] for detailed discussions on this topic.
The rest of the chapter is organized as follows. Section 1.2 briefly introduces
the challenges of building MPSoC compilers, using a comparison of an MPSoC
compiler to a uni-processor compiler, followed by Sect. 2 where detailed discussions
are carried out. Section 3 looks into how the challenges are tackled by demonstrating
a number of case studies of MPSoC compiler construction in academia and industry.

1.2 Challenges of Building MPSoC Compilers

Before the multi-processor or multi-core era, the uni-processor-based hardware sys-
tem has been very successful in creating a comfortable and convenient programming
environment for software developers. The success is largely due to the fact that
the sequential programming model is very close to the natural way humans think
and that it has been taught for decades in the basic engineering courses. Also,
the compilers of high-level programming languages like C for uni-processors are
well studied, which hide nearly all the hardware details from the programmers as a
holistic tool [ 38 ] . The user-friendly graphical integrated development environments
(IDEs) like Eclipse [ 1 ] and mature debugging tools like gdb [ 2 ] also contribute to
the good ecosystem of hardware and software in the uni-processor age.
The complexity of programming and compiling for MPSoC architectures has
increased a great deal, compared to the uni-processor. The reasons are many-fold
and the most important two are as follows. On one hand, MPSoCs inherently ask
for applications being written in parallel programming models so as to efficiently
utilize the hardware resources. Parallel programming (or thinking) has been proven
to be difficult for programmers, despite many years' efforts in high-performance
computing. On the other hand, the heterogeneity of MPSoC architectures requires