Hardware Reference
In-Depth Information
An Instruction Fetch Unit
Both of the foregoing techniques are worth using, but to get a dramatic im-
provement we need something much more radical. Let us step back and look at the
common parts of every instruction: the fetching and decoding of the fields of the
instruction. Notice that for every instruction the following operations may occur:
1. The PC is passed through the ALU and incremented.
2. The PC is used to fetch the next byte in the instruction stream.
3. Operands are read from memory.
4. Operands are written to memory.
5. The ALU does a computation and the results are stored back.
If an instruction has additional fields (for operands), each field must be expli-
citly fetched, 1 byte at a time, and assembled before it can be used. Fetching and
assembling a field ties up the ALU for at least one cycle per byte to increment the
PC, and then again to assemble the resulting index or offset. The ALU is used
nearly every cycle for a variety of operations having to do with fetching the in-
struction and assembling the fields within the instruction, in addition to the real
''work'' of the instruction.
In order to overlap the main loop, it is necessary to free up the ALU from some
of these tasks. This might be done by introducing a second ALU, though a full
ALU is not necessary for much of the activity. Notice that in many cases the ALU
is simply used as a path to copy a value from one register to another. These cycles
might be eliminated by introducing additional data paths not going through the
ALU. Some benefit may be derived, for example, by creating a path from
TOS
to
MDR
, or from
MDR
to
TOS
, since the top word of stack is frequently copied be-
tween those two registers.
In the Mic-1, much of the load can be removed from the ALU by creating an
independent unit to fetch and process the instructions. This unit, called an
IFU
(
Instruction Fetch Unit
), can independently increment
PC
and fetch bytes from
the byte stream before they are needed. This unit requires only an incrementer, a
circuit far simpler than a full adder. Carrying this idea further, the IFU can also
assemble 8- and 16-bit operands so that they are ready for immediate use whenever
needed. There are at least two ways this can be accomplished:
1. The IFU can actually interpret each opcode, determining how many
additional fields must be fetched, and assemble them into a register
ready for use by the main execution unit.
2. The IFU can take advantage of the stream nature of the instructions
and make available at all times the next 8- and 16-bit pieces, whether
or not doing so makes any sense. The main execution unit can then
ask for whatever it needs.
