Hardware Reference
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for an eight-input multiplexer. The three control lines, A , B , and C , encode a 3-bit
number that specifies which of the eight input lines is gated to the OR gate and
thence to the output. No matter what value is on the control lines, seven of the
AND gates will always output 0; the other one may output either 0 or 1, depending
on the value of the selected input line. Each AND gate is enabled by a different
combination of the control inputs. The multiplexer circuit is shown in Fig. 3-11.
D 0
D 1
D 2
D 3
F
D 4
D 5
D 6
D 7
AA B
BC
C
ABC
Figure 3-11. An eight-input multiplexer circuit.
Using the multiplexer, we can implement the majority function of Fig. 3-3(a),
as shown in Fig. 3-12(b). For each combination of A , B , and C , one of the data
input lines is selected. Each input is wired to either V cc (logical 1) or ground (logi-
cal 0). The algorithm for wiring the inputs is simple: input D i is the same as the
value in row i of the truth table. In Fig. 3-3(a), rows 0, 1, 2, and 4 are 0, so the cor-
responding inputs are grounded; the remaining rows are 1, so they are wired to log-
ical 1. In this manner any truth table of three variables can be implemented using
the chip of Fig. 3-12(a).
We just saw how a multiplexer chip can be used to select one of several inputs
and how it can implement a truth table. Another of its many applications is as a
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