SOFTWARE DESIGN VERIFICATION AND VALIDATION - Software Design for Six-Sigma: A Roadmap for Excellence - page 507

FIGURE 19.5 MIL process from dSPACE catalog (Wixom, MI) dSPACE 2008. 6

19.4.1.4 HIL. Once it is certain that the software performs as intended and that
there are no defects in the hardware, the final in-the-loop stage, HIL is undertaken to
prove that the control mechanism can perform its intended functionality of operating
on a hardware system. At this point, a test procedure such as joint test action group
(JTAG)/boundary scan may be considered for hardware testing prior to implementing
a system under test (SUT) scheme. JTAG boundary scan specification outlines a
method to test input and output connection, memory hardware, and other logical
subcomponents that reside within the controller module or the printed circuit board.
The JTAG specification makes it possible to access transparently structural areas of
the board under test using a software controlled approach.
According to joint open source initiative UNISIM 7 (Houston, TX), “Simulation
is a solution to the test needs of both microprocessors and software running on
microprocessors.” “A silicon implementation of these microprocessors usually is

6 http://www.dSPACE.de.
7 (www.unisim.org).