A Simple Computer Design: The uP 3 - Rapid Prototyping of Digital Systems - page 181

PROCESS ( CLOCK, RESET )

BEGIN

IF reset = '1' THEN

state <= reset_pc;

ELSIF clock 'EVENT AND clock = '1' THEN

CASE state IS

-- reset the computer, need to clear some registers

WHEN reset_pc =>

program_counter <= "00000000";

register_AC <= "0000000000000000";

state <= fetch;

-- Fetch instruction from memory and add 1 to PC

WHEN fetch =>

instruction_register <= memory_data_register;

program_counter <= program_counter + 1;

state <= decode;

-- Decode instruction and send out address of any data operands

WHEN decode =>

CASE instruction_register( 15 DOWNTO 8 ) IS

WHEN "00000000" =>

state <= execute_add;

WHEN "00000001" =>

state <= execute_store;

WHEN "00000010" =>

state <= execute_load;

WHEN "00000011" =>

state <= execute_jump;

WHEN OTHERS =>

state <= fetch;

END CASE ;

-- Execute the ADD instruction

WHEN execute_add =>

register_ac <= register_ac + memory_data_register;

state <= fetch;

-- Execute the STORE instruction

-- (needs two clock cycles for memory write and fetch mem setup)

WHEN execute_store =>

-- write register_A to memory, enable memory write

-- load memory address and data registers for memory write

state <= execute_store2;

--finish memory write operation and load memory registers

--for next fetch memory read operation

WHEN execute_store2 =>

state <= fetch;

-- Execute the LOAD instruction

WHEN execute_load =>

register_ac <= memory_data_register;

state <= fetch;

-- Execute the JUMP instruction

WHEN execute_jump =>

program_counter <= instruction_register( 7 DOWNTO 0 );

state <= fetch;

WHEN OTHERS =>

state <= fetch;