Using VHDL for Synthesis of Digital Hardware - Rapid Prototyping of Digital Systems - page 110

displayed in hexadecimal. MSD is the left or most-significant digit. Another
identical process with a different input variable is needed for the second display
digit.
LED_MSD_DISPLAY: -- BCD to 7 Segment Decoder for LED Displays

PROCESS (MSD)
BEGIN

-- Case statement implements a logic truth table

CASE MSD IS

WHEN "0000" =>

MSD_7SEG <= "1111110";

WHEN "0001" =>

MSD_7SEG <= "0110000";

WHEN "0010" =>

MSD_7SEG <= "1101101";

WHEN "0011" =>

a

MSD_7SEG <= "1111001";

WHEN "0100" =>

f b

g

MSD_7SEG <= "0110011";

WHEN "0101" =>

MSD_7SEG <= "1011011";

e c

WHEN "0110" =>

dp

MSD_7SEG <= "1011111";

d

WHEN "0111" =>

MSD_7SEG <= "1110000";

WHEN "1000" =>

MSD_7SEG <= "1111111";

WHEN "1001" =>

MSD_7SEG <= "1111011";

WHEN OTHERS =>

MSD_7SEG <= "0111110";

END CASE ;

END PROCESS LED_MSD_DISPLAY;

The following VHDL concurrent assignment statements provide the value to be
displayed and connect the individual segments. NOT is used since a logic zero
actually turns on the LED. Automatic minimization in the synthesis process
will eliminate the extra inverter in the logic circuit. Pin assignments for the
seven-segment display must be included in the project's *.qsf file or in the top-
level schematic.

-- Provide 4-bit value to display

MSD <= PC ( 7 DOWNTO 4 );
-- Drive the seven-segments (LEDs are active low)
MSD_a <= NOT MSD_7SEG( 6 );
MSD_b <= NOT MSD_7SEG( 5 );
MSD_c <= NOT MSD_7SEG( 4 );
MSD_d <= NOT MSD_7SEG( 3 );
MSD_e <= NOT MSD_7SEG( 2 );