Models for Bridging Defects Test and Diagnosis - Models in Hardware Testing - page 62

a b

b

a

a/b

c

I DDQ threshold limit I DDQ threshold limit

Leakage Leakage

Pattern Pattern

Fig. 2.24 Current measurements of circuit in ( a )Fig. 2.22 a , ( b )Fig. 2.22 b

a b

Number of patterns Number of patterns

Fig. 2.25 Current signatures of the defective circuits in ( a )Fig. 2.22 a , ( b )Fig. 2.22 b

Reordering the I DDQ measurements in increasing order, the current signatures
( Gattiker and Maly 1996 ; Nigh and Gattiker 2004 ) corresponding to the two exam-
ples are presented in Fig. 2.25 . On one hand, the current signature corresponding to
the bridge between the output of the NAND gate and the inverter has three current
steps. However, the one from the bridge between the inverters has only one current
step. Notice that the two bridges, equivalent under the assumption of the simple
I DDQ bridging fault model, become now distinguishable ( Arumı et al. 2007a )

2.4.2.2 Downstream Current Contribution

It has been illustrated how it is possible to discriminate between different bridging
faults if the current information given by the network strengths is treated prop-
erly. However, it is well known that a bridge may cause voltage degradation on the
bridged nodes ( Rodrıguez-Montanes et al. 1991 ). This voltage degradation causes,
in turn, the gates driven by the bridged nodes (downstream gates) to consume more
current than expected, as long as the proper conditions are given. Hence, the total
current (I t ) caused by a bridging fault comprises two components: the bridge cur-
rent (I b ) and the downstream current (I d ) ( Rubio et al. 1991 ; Arumı et al. 2007b ) .