Models for Bridging Defects Test and Diagnosis - Models in Hardware Testing - page 63

a
V A

b

V D

I b

V B

V B

V C

V A V D

V E V G V F

I b R b

R b

I d

V C

V G

I d

V E V F

c d

I b
V A V D

V B

V B

V C V C

V A V D

V E V E

V G V F V G V F

R b R b

I b

I d

I d

Fig. 2.26 Bridging fault with downstream current. ( a ) Gate level and ( b ) both pMOS transistors
on (NAND gate), ( c ) one pMOS transistor on ( d ) nMOS network on (NAND gate)

In order to evaluate the impact of the downstream current, let us consider the
example in Fig. 2.26 a . It is similar to the one in Fig. 2.22 a , but now the inverter
is driving, in turn, a NAND gate. When the bridge is activated, the current flowing
through V D and V E generates the bridge current. Due to voltage degradation on V E ,
there may be also downstream current flowing through the NAND gate provided
that V F is set to logic 1. The three possible network excitations in the presence of
downstream current (V F D 1) are described in Fig. 2.26 b , c, and d, respectively.
The magnitude of the downstream current depends on different factors, namely:
the bridged networks, the topology of the downstream gate and the bridge resistance.
The relationship between the downstream current and the voltage of the bridged
node is similar to the current behaviour in the presence of a floating node caused by
an interconnect full open. If an intermediate voltage value is induced between V Tn
and (V DD V Tp ), downstream current is generated. The amount of current depends
on the exact voltage value, as observed in Fig. 2.27 a .
Neglecting the downstream current, the current signatures for the examples in
Figs. 2.22 a and 2.26 a would be identical. Nevertheless, regarding the example in
Fig. 2.26 a , for every network combination, there are two possibilities depending on
the V F value. If V F is set to logic 0, there is not downstream current. In this case,
the total current is the same as in Fig. 2.25 a . However, for the patterns that set V F to
logic 1, there is downstream current, which increases the total current caused by the
bridge. In this sense, every of three upper current levels may unfold into two sub-
levels, as illustrated in Fig. 2.27 b . Notice that the current signature is quite different
since seven current levels are now reported.
Arum´ıetal. ( 2007 , 2008 ) proposed a method to minimise the effect of the down-
stream current that consists in decreasing V DD , to the point that the downstream
current becomes negligible and the bridge current (I b ) is practically equal to the
total current (I t ). Figures 2.28 and 2.29 illustrate the current signature for a real