Fault Modeling for Simulation and ATPG - Models in Hardware Testing - page 109

Fig. 4.2 Example circuit

fault site as inputs. Furthermore, the test set and the fault list must be provided. The
fault list could include all bridging faults in the circuit or a selection of faults which
are most likely to occur ( realistic faults ). Techniques such as inductive fault anal-
ysis ( Ferguson 1988 )or inductive contamination analysis ( Khare 1996 ) areoften
employed to determine realistic faults: the proximity of interconnects in the phys-
ical layout of the circuit is evaluated and the probability that a particle of certain
size will bridge two interconnects is calculated. Interconnect pairs for which this
probability is sufficiently high are considered as candidates for realistic bridging
faults.
Procedure RBF FSIM calculates C-ADI of each fault and aggregates it to fault
coverage metrics introduced above (G-ADI information must be provided to ob-
tain G-FC ). C-ADI of each fault is initially set to empty in Line (1). In Lines (2)
through (11), the procedure determines, for each test vector and each fault f i ,resis-
tance ranges (ADIs) in which the fault is detected and adds these ranges to C-ADI
(Line 9). The calculation of the ADIs in Lines (5) through (7) is the core of the
algorithm. These computations are explained in more detail using the bridging fault
between signal lines a and b in the circuit in Fig. 4.2 as an example. The description
avoids in-depth discussions on electrical modeling issues. Only concepts essential
for understanding the algorithm, such as critical resistances, are introduced. Refer
to Chapter 2 for more information on electrical modeling.

4.2.1 Local Electrical Analysis

Consider the circuit in Fig. 4.2 . We call the logical values applied to the inputs of the
gates which drive the bridged signal lines fault-site input combination (FSIC). Note
that in Fig. 4.2 , these lines are primary inputs of the circuit, while in general they
could also be located within a larger circuit. In a combinational circuit, the FSIC
is induced by the input vector. Assume FSICs 0011 and 0111. Good-simulation in
Line (4) of Procedure RBF FSIM will report the logic values of 1 and 0 at signal
lines a and b, respectively, for both FSICs. In absence of the bridge, or for a bridge
of infinite resistance, the voltage on a will equal V DD and the voltage on b will
equal 0V. If the bridge resistance R sh equals 0 , both a and b will assume some