Digital Signal Processing Reference
In-Depth Information
drives the drain voltage of mn
4
about 200 mV in the saturation region. More
important is the overdrive voltage of the input transistor pair, as it will limit
the signal swing at the input of the amplifier. Since the overdrive voltage of the
input pair is 132 mV, a differential input swing of more than 400 mV
ptp
can be
properly handled. Also note that the output resistance of each transistor that
is connected to the output terminals of the amplifier was kept above 10 k
.
This way, the total value of unwanted parasitic output resistance makes up less
than 20% of the impedance of the nonlinear load (1
/g
mo
). As a final remark,
it should be taken into account that in the tapered buffer setup (scaling factor
x
=
1
.
45), the total capacitive load will increase by around 10%.
Layout of the tapered buffer
During the entire design process, economy of time and effort was kept in mind.
The layout was started by the construction of a high-level floorplan where the
number and position of the bonding pads was determined. The amplifier has
in total four high-frequency in- and outputs. At the off-chip level, interfacing
with each of these lines occurs with (large) microstrip lines which transport
the signal as close as possible to the bonding pads of the chip. For this reason,
each of the four io-lines was given a central position at one of the edges of the
chip die (Figure 7.8). The remaining dc-carrying nodes are located alongside
the central terminals: under the ideal circumstances, not only the actual ground
terminal, but also the power supply and biasing lines can act as a virtual ground
shields for the ac-input signals.
The layout of the chip is based on a modular design, using only four basic
building blocks: an esd subcell, a power supply decoupling cell, an offset
compensation subcircuit and finally also a minimum sized core amplifier. The
layout of the core amplifier blocks is arranged in such a manner that two core
cells can be joined together from any direction. The layout structure of a sin-
gle core cell is shown in Figure 7.7. Also shown in this layout are all external
connections from this cell to the outside world. Remark that the same intercon-
nect lines appear at each of the four sides of the amplifier. Doing this way, it
becomes possible to stack several amplifier modules together in order to form
a new amplifier with larger driving capabilities.
Instead of starting a new design with the appropriate dimensions for every of
the eight stages in the amplifier chain, the required number of core amplifier
cells is sticked together at the next higher abstraction level in the layout. No
extra interconnect effort is needed thanks to the modular approach of the core
cells. The first stage in the chain embodies only two amplifier cells. Based
on the upscaling factor of
x
1
.
45, the next stage contains three cells and
so on until the last stage, which contains a 16-valve core engine. The offset
=
