Digital Signal Processing Reference
In-Depth Information
nVdd
nTune
nVdd
nTune
Vout +
Vout +
Vout -
Vcmfb +
Vout-
Vcmfb +
Vcmfb -
Vcmfb -
24μm
Vin +
Vin +
Vin-
Vin -
Vcmfb
Vcmfb
Vbias1
Vbias1
Vbias2
Vbias2
Figure 7.7.
Layout of the open-loop core cell module of Figure 7.6. Several of these core
cells can be stacked to each other to form an amplifier stage with higher driving
capabilities. A total of 58 modules were used in the eight-stage amplifier.
compensation circuit is based on the same principle: it can be plugged to any
of the edges of a core amplifier assembly. Most of the area of the offset com-
pensation circuitry is taken into account by the low-pass filter, which defines
the 3 dB corner frequency at the lower end of the spectrum. Signal frequencies
below this pole will be treated as offset and are thus suppressed.
At the next level in the design hierarchy, the remaining space in the active
area of the chip is filled up with decoupling modules which are divided among
the power supply and biasing lines of the amplifier chain. The total area of
all stacked amplifiers, offset regulators and decoupling capacitors adds up to
0
.
38
0
.
38 mm
2
. Only one hierarchical level in the layout has to be completed
by now: the esd protection layer is placed in between the baseband ampli-
fier in the center of the chip and the bonding pads. Fully compatible with the
rest of the design, the protection ring is also built around a basic platform of
stackable esd modules. With only minimal intervention, the base esd unit
can be adapted to fit the needs of a power supply input, a biasing terminal, or
an io-line. For example, if the esd structure is connected to one of the high-
frequency input lines of amplifier, a 50
termination resistor can be placed in
a special notch of the base esd module.
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