MOLECULAR COMPUTING: INTEGRATION OF MOLECULES FOR NANOCOMPUTING - Bio-Inspired and Nanoscale Integrated Computing - page 320

Figure 11.13. (a) Schematic of a silicon nanowire-FET in which Pt contacts are
used as the source and drain electrodes, Si 3 N 4 (300nm) as the dielectric layer, and
a highly doped (dopant: phosphorus at a level of

10 20 cm 3 ) Si(100) substrate as
the gate. (b) SEM image of a silicon nanowire-FET (1 mm bar). (c) A schematic of
the sequence involving the treatment of an oxide-coated silicon nanowire with
aqueous ammonium fluoride for seconds (typically 20-60 s) to generate the
silicon oxide/fluoride surface (F-decoration) that shows the higher conductivity
and mobility, and then after minutes (typically 10-12min) of continued ammo-
nium fluoride treatment, it forms the H-passivated silicon surface which results in
low conductivity and mobility for the silicon nanowire.

B

Thinning of the gate nitride would reduce the voltage constraints in the system.
Furthermore, the OFF state was never near zero, possibly because the surface
charge could not be completely discharged.

11.6. CONCLUSIONS

This chapter presented an overview of the switching mechanisms in molecular
bundles, as well as circuit and architecture proposals for their large-scale
integration. Despite years of research endeavor, existing technologies still remain
far from practical use and considerable research and development is necessary to