COMPUTING WITH QUANTUMDOT CELLULAR AUTOMATA - Bio-Inspired and Nanoscale Integrated Computing - page 135

D1

D2

Memory D0 Memory

D3

Figure 4.26. The most basic memory element in QCA is the loop. As each of the
clocks latch and unlatch they circulate information around the loop.

4.11.4. Memory Cell
Extra control can be added to the memory loop to create a memory cell. The
memory cell is a building block of random access memory (RAM) and implements
a bit-level read/write function [75]. The QCA memory is volatile, and all stored
information will be lost when the power to the circuit is disconnected. In order to
control the function of this memory cell, we introduce two controls and one input.
The first control wire, called the Row Select, serves to enable the memory cell to be
used in a larger memory grid. The second control, called the Read/Write, selects
the present operation to be performed on the memory. A schematic representation
of the loop memory cell is shown in Figure 4.27.
The associated QCA circuit layout is shown in Figure 4.28. This layout
attempts to maximize the application of the memory cell to larger memories, by
running the Row Select and Read/Write control wires through the entire length of
the cell. In this way, a row of memory can be created by simply laying out these
cells in a linear array and extending the control wires to each of the cells.

D0

Row select

D1

− 1 D2

D1

D0 M D2 M D3 Output

− 1

D2

− 1

D1

− 1

D0 M

Input D1 D2 D3 1

− 1 D3

M

M D1 D2

D0

Read/write

Figure 4.27. Schematic of the 1-bit memory cell.