Hardware Reference
In-Depth Information
RX0
RX1
MSCAN
RX2
RX3
RX4
RXF
CPU bus
Figure 13.38
■
User model for receive buffer organization
Whenever a valid message is received at the background receive buffer, it will be trans-
ferred to the foreground receive buffer and the RXF flag will be set to 1. The user's receive
handler program has to read the received message from the RxFG and then reset the RXF flag to
acknowledge the interrupt and to release the foreground buffer.
When the MSCAN module is transmitting, the MSCAN receives its own transmitted mes-
sages into the background receive buffer but does not shift it into the receiver FIFO or generate
a receive interrupt. An overrun condition occurs when all receive message buffers in the FIFO
are filled with correctly received messages with accepted identifiers and another message is
correctly received from the bus with an accepted identifier. The latter message is discarded
and an error interrupt with overrun indication is generated if enabled. The MSCAN is still able
to transmit messages while the receiver FIFO is being filled, but all incoming messages are
discarded. As soon as a receive buffer in the FIFO is available again, new valid messages will
be accepted.
The MSCAN identifier acceptance registers define the acceptance patterns of the standard
or extended identifier. Any of these bits can be marked “don't care” in the MSCAN identifier
mask registers.
A message is accepted only if its associated identifier matches one of the identifier filters.
A filter hit is indicated to the application software by a RXF flag setting to 1 and the 3 hit bits
in the CAN
x
IDAC register. These hit bits identify the filter section that caused the acceptance.
In case more than one hit occurs, the lower hit has priority. The identifier acceptance filter is
programmable to operate in four different modes.
1. Two identifier acceptance filters with each filter applied to (a) the full 29 bits of the
extended identifier, the SRR bit, the IDE bit, and the RTR bit or (b) the 11 bits of the
standard identifier plus the RTR and IDE bits. This mode may cause up to two hits.
2. Four identifier acceptance filters with each filter applied to (a) the 14 most significant
bits of the extended identifier plus the SRR and IDE bits or (b) the 11 bits of the
standard identifier plus the RTR and IDE bits. This mode may cause up to four hits.
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