Hardware Reference
In-Depth Information
3. Eight identifier acceptance filters with each filter applied to the first 8 bits of the
identifier. This mode implements eight independent filters for the first 8 bits of the
extended or standard identifier. This may cause up to eight hits.
4. Closed filter. No CAN message is copied into the foreground buffer RxFG, and the
RXF flag is never set.
The MSCAN clock generation circuitry is shown in Figure 13.39. This clock circuitry
allows the MSCAN to handle CAN bus rates ranging from 10 kbps up to 1 Mbps. The CLKSRC
bit in the CAN
x
CTL1 register defines whether the internal CANCLK is connected to the out-
put of a crystal oscillator or to the E-clock. The clock source has to be chosen such that the tight
oscillator tolerance requirements (up to 0.4 percent) of the CAN protocol are met. Additionally,
for a high CAN bus rate (1 Mbps), a 45 to 55 percent duty cycle of the clock is required.
MSCAN
E-clock
Time quanta clock (
t
Q
)
CANCLK
Prescaler
(1, . . . , 64)
CLKSRC
CLKSRC
Oscillator clock
Figure 13.39
■
MSCAN clocking scheme
If the E-clock is generated from a PLL, it is recommended to select the oscillator clock
rather than the E-clock due to jitter considerations, especially at the faster CAN bus rate. For
microcontrollers without a clock and reset generator (CRG), CANCLK is driven from the crys-
tal oscillator.
A programmable prescaler generates the time quanta (
t
Q
) clock from CANCLK. A time
quantum is the atomic unit of time handled by the MSCAN. The frequency of the time quan-
tum is derived from the CANCLK using the following expression:
f
t
Q
5
f
CANCLK
÷
prescaler value
Slightly deviated from Figure 13.12, the MSCAN divides a bit time into three segments
(shown in Figure 13.40) rather than four segments.
•
Sync_seg. This segment is fixed at 1 time quantum. Signal edges are expected to
happen within this segment.
•
Time segment 1. This segment includes the
prop_seg
and the
phase_seg1
of the
CAN standard. It can be programmed by setting the TSEG1 parameter of the
CAN
x
BTR1 register to consist of 4 to 16 time quanta.
•
Time segment 2. This segment represents the
phase_seg2
of the CAN standard. It
can be programmed by setting the TSEG2 parameter of the CAN
x
BTR1 register to
be 2 to 8 time quanta long.
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