Hardware Reference
In-Depth Information
For example,
staa B, X ; m[[B]
1
[X]]
←
[A]
stores the contents of A in the memory location of which the address equals the sum of the
contents of B and X.
For the instruction
ldx D, SP
the HCS12 performs the following operations:
X
←
[[D]
1
[SP]]:[1
1
[D]
1
[SP]]
; 2 bytes are loaded into X
The syntax and resultant effective address of this mode are shown in Table 1.4. For
the predecrement/preincrement version of this addressing mode, the HCS12 decrements/
increments the specified base register by the specified amount (
n
in Table 1.4) before
using the contents of the base register as an effective address to access memory. For the
postdecrement/postincrement version of this address mode, the HCS12 uses the contents
of the specified base register as the effective address to access memory and then decre-
ments/increments the specified base register. For example, if index register X contains
$1000, then
staa 2,
2
X ; predecrement X
stores the contents of accumulator A in the memory location at $9FE and the new value in X
becomes $9FE.
ldaa 2,
1
X ; preincrement X
loads the contents of memory location at $1002 into A and the new value of X is $1002.
sty 2, X
2
stores the high and low bytes of Y in memory locations at $1000 and $1001, respectively. After
that, index register X receives the new value of $9FE.
ldaa 4, X
1
loads the contents of the memory location at $1000 into A. After that, index register X receives
the new value of $1004.
Effective
Address
[
New Value of
Base Register r
Syntax
Example
Comment
n
, -
r
r
] -
n
[
r
] -
n
std 2, -SP
ldd 2, +SP
std 2, X-
std 2, Y+
Predecrement
Preincrement
Postdecrement
Postincrement
n
, +
r
[
r
] +
n
[
r
] +
n
n
,
r
-
[
r
]
[
r
] -
n
n
,
r
+
[
r
]
[
r
] +
n
Note:
n
= amount of decrement or increment.
r
= base register (may be X, Y, or SP).
Table 1.4
■
Auto predecrement/increment or auto postdecrement/increment indexed modes
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