Introduction to the HCS12 Microcontroller - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 28

1.9.10 16-Bit Offset Indexed Indirect Mode
The syntax of this addressing mode is as follows:
[n, r]
where
n is the 16-bit offset
r is the base register and can be X, Y, SP, or PC
In this mode, the HCS12 fetches the actual effective address from the memory location
with address equal to the sum of the 16-bit offset and the contents of the base register and then
uses that effective address to access the operand. The square brackets distinguish this address-
ing mode from 16-bit constant offset indexing; for example,
ldaa [10, X]
In this example, index register X holds the base address of a table of pointers. Assume that
X has an initial value of $1000, and that $2000 is stored at addresses $100A and $100B. The in-
struction first adds the value 10 to the value in X to form the address $100A. Next, an address
pointer ($2000) is fetched from memory locations at $100A and $100B. Then, the value stored
in $2000 is read and loaded into accumulator A.

1.9.11 Accumulator D Indirect Indexed Addressing
The syntax of this addressing mode is as follows:
[D, r ]
where
r is the base register and can be X, Y, SP, or PC
This indexed addressing mode adds the value in accumulator D to the value in the base
index register to form the address of a memory location that contains a pointer to the memory
location affected by the instruction. The instruction operand points not to the memory location
to be acted on but rather to the location of a pointer to the location to be acted on. The square
brackets distinguish this addressing mode from accumulator D offset indexing. For example,
the following instruction sequence implements a computed GOTO statement:

jmp [D, PC]

GO1 dc.w target1 ; the keyword dc.w reserves 2 bytes to hold the

GO2 dc.w target2 ; value of the symbol that follows

GO3 dc.w target3 ; “

. . .
target1 . . .
.
.
target2 . . .
.
.
target3 . . .
.
.
In this instruction segment, the names (also called labels) target1 , target2 , and target3 are
labels that represent the addresses of the memory locations that the jmp instruction may jump
to. The names GO1, GO2, and GO3 are also labels. They represent the memory locations that
hold the values of the labels target1 , target2 , and target3 , respectively.