Hardware Reference
In-Depth Information
6.12 Summary
Interrupt is a special event that requires the CPU to stop normal program execution and
provide a certain service to the event. The interrupt mechanism has many applications, includ-
ing coordinating I/O activities, exiting from software errors, and reminding the CPU to perform
routine work, and so on.
Some interrupts are maskable and can be ignored by the CPU. Other interrupts are non-
maskable and cannot be ignored by the CPU. Nonmaskable interrupts are often used to handle
critical and emergent events such as process control and power failure.
Multiple interrupts may be pending at the same time. The CPU needs to decide which one
to service first. The solution to this issue is to prioritize all of the interrupt sources. The pend-
ing interrupt with the highest priority will receive service before other pending interrupts.
The CPU provides service to an interrupt request by executing an interrupt service routine .
The current program counter value is saved in the stack before the CPU executes the service
routine so that CPU control can be returned to the interrupted program when the interrupt ser-
vice routine is completed.
In order to provide service to the interrupt, the CPU must have some way to find out the
starting address of the interrupt service routine. There are three methods to determine the start-
ing address (called interrupt vector ) of the interrupt service routine.
1. Each interrupt vector is predefined when the microcontroller is designed. In this
method, the CPU simply jumps to the predefined location to execute the service
routine.
2. Each interrupt vector is stored in a predefined memory location. When an
interrupt occurs, the CPU fetches the interrupt vector from that predefined
memory location.
The HCS12 uses this approach.
3. The interrupt source provides an interrupt vector number to the CPU so that the CPU
can figure out the memory location where the interrupt vector is stored. The CPU
needs to perform a read bus cycle to obtain the interrupt vector number.
There are three steps in the interrupt programming.
Step 1
Initialize the interrupt vector table that holds all the interrupt vectors. This step is not
needed for those microcontrollers that use the first method to resolve the interrupt vector.
Step 2
Write the interrupt service routine.
Step 3
Enable the interrupt to be serviced.
Users who own a demo board with a resident D-Bug12 monitor would use the EVB mode
for application development. The D-Bug12 monitor has occupied the default memory space
where the interrupt vectors are to be stored. To enable the user to use interrupts in their appli-
cations, D-Bug12 allows vectors to be stored in a table in the SRAM.
Clock signals are critical to the proper operation of the MCU. The HCS12 has a phase-
locked-loop (PLL) circuit that can be used to generate the system clock and E-clock with a fre-
quency higher than that of the external crystal oscillator. The PLL can generate a high-frequency
clock signal using a low-frequency crystal. In addition, the PLL provides stability to the clock
signals.
 
Search WWH ::




Custom Search