Design of the Dynamic Supply CMOS RF Power Amplifie - Linear CMOS RF Power Amplifiers for Wireless Applications - page 27

Fig. 3.12 MOS transistor's transfer characteristic and loadline for class A operation

The quiescent drain voltage ( V DC ) and current ( I DC ) can be written as a function
of V BR , V knee , and I max , yielding

V BR +

V knee

V DC = , (3.12)

2

and

I max
2

I DC = . (3.13)

Equation ( 3.11 ) can be rewritten as
⎧
⎨

(V BR − V knee ) × I DC

P out _ max = ,

4

(V BR − V knee ) × I max

P out _ max = , (3.14)

⎩

8

(V DC − V knee ) × I max
4

P out _ max = .

The optimum resistance is calculated by the loadline in Fig. 3.12 as

V DC −

V knee
I DC

R opt =

, (3.15)

which can be rewritten as a function of the maximum output power as

V knee ) 2
2 P out _ max

(V DC −

R opt = , (3.16)

or as

(V BR − V knee ) 2
8 P out _ max

R opt = . (3.17)