Hardware Reference
In-Depth Information
received, the slave issues an ack bit, which (for obvious reasons) can only be a '0'. As
also depicted in i gure 14.8a, the slave stores the data available on the
SDA
wire at the
positive edge of
SCL
and places data on that wire at the negative edge.
The main time parameters are summarized in i gure 14.8b, which have the follow-
ing meaning:
t
SU_STA
(setup time for start):
SCL
stable high before
SDA
high-to-low transition.
t
HD_STA
(hold time for start):
SCL
still stable high after
SDA
high-to-low transition.
t
SU_DAT
(setup time for data): data or address stable before
SCL
pulse.
t
HD_DAT
(hold time for data): data or address still stable after
SCL
pulse.
t
SU_STO
(setup time for stop):
SCL
stable high before
SDA
low-to-high transition.
t
BUF
(bus-free time): bus-free time before another data transmission.
Figure 14.8b also shows examples of numerical values for these time parameters. A
very important observation is that
t
HD_DAT
= 0 (this is generally true for I
2
C-interfaced
devices), which causes the simpler timing diagram of i gure 14.8c to be allowed.
The overall I
2
C protocol is summarized in i gure 14.9. In i gure 14.9a the master
writes data to a slave, whereas in i gure 14.9b it reads data from a slave. White blocks
represent actions taken by the master, and gray blocks indicate actions taken by
the slave.
Figure 14.9
Summary of I
2
C operation for (a) writing and (b) reading.
