Hardware Reference
In-Depth Information
Figure 11.19
a) Draw a state transition diagram for a machine that solves this problem for any
(arbitrarily long) value of
N
.
b) Based on your solution, i ll in the missing plots in i gure 11.19.
c) How many DFFs are needed to build your machine, assuming that sequential encod-
ing is used and that
N
= 256 bits?
Exercise 11.6: Reference-Value Defi ner with Embedded Debouncer #1
This exercise concerns the reference-value dei ner with embedded debouncer seen in
i gure 11.10b.
a) Assuming that
ref
is an eight-bit signal, regular sequential encoding is used for the
FSM, the debouncing time interval is 1 ms, and
f
clk
= 50 MHz, calculate the number
of l ip-l ops needed to build that circuit.
b) The inputs
up
and
dn
are asynchronous. Is a synchronizer (section 2.3) needed in
this application?
Exercise 11.7: Reference-Value Defi ner with Embedded Debouncer #2
We saw in i gure 11.10b an FSM that embeds, in the reference-value dei ner of i gure
11.7d, a pair of debouncers for the
up
and
dn
pushbuttons.
a) Using the same principle, modify the state transition diagram of i gure 11.7b in
order to include in it a debouncer for the '0'-to-'1' transitions of
up
.
b) Determine the number of DFFs needed to implement your FSM, assuming that
sequential encoding is used,
ref
is an eight-bit signal, the debouncing interval is 1 ms,
and
f
clk
= 50 MHz.
Exercise 11.8: Greatest Common Divisor
The algorithm and a corresponding l owchart for calculating the greatest common
divisor (GCD) between two integers
a
and
b
are presented in i gure 5.12. A data-valid
