Hardware Reference
In-Depth Information
Figure 11.20
(
dv
) pulse, lasting only one clock period, informs when the computations must start.
We want to redesign that machine, now without the datapath (so this is a
complete
GCD calculator). Note that the “load data” block of i gure 5.12 is not indispensable
here, but then the inputs must remain stable during the whole computations. Because
the circuit will take a variable amount of time to compute the GCD (it depends on
the input values), an output called
done
must be provided, which should remain high
while the machine is idle. Draw a state transition diagram for an FSM capable of
solving this problem.
Exercise 11.9: Factorial Calculator
An algorithm for calculating
f
=
n
! (
n
0, integer) is described in the l owchart of
i gure 11.20. Assume that
dv
(data valid) is asserted during one clock cycle, indicating
when the data (
n
) is ready, so the computation should commence. Because the circuit
will take a variable amount of time to compute
f
(it depends on the value of
n
), an
output called
done
must be provided, which should remain high while the machine
is idle. Draw a state transition diagram for a Moore-type machine that solves this
problem.
≥
Exercise 11.10: Datapath Control for a Sequential Multiplier
This exercise concerns the datapath and corresponding control unit for multiplication
using add-and-shift operations seen in i gure 11.12.
a) How many l ip-l ops are needed to build the machine of i gure 11.12b for
N
= 4
and for
N
= 32 bits?
b) Draw a timing diagram that illustrates its operation (as done in i gure 5.13d, for
example), for
N
= 4. Consider that the i rst four values of
prod
(0), after
dv
= '1' occurs,
are
prod
(0) = {'1', '0', '1', '0'}.
