Hardware Reference
In-Depth Information
lines 24-42, relative to state A, that the output values are now conditional. Compare
these lines against lines 30-37 in the previous template.
1 //Timed Mealy machine with timer control strategy #1
2 //Part 1: Module header:----------------------------
3
(same as for category 2 Moore, section 10.2)
4
5 //Part 2: Declarations:-----------------------------
6
7
//FSM-related declarations:
8
(same as for category 2 Moore, section 10.2)
9
10
//Timer-related declarations:
11
(same as for category 2 Moore, section 10.2)
12
13 //Part 3: Statements:-------------------------------
14
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//Timer (using timer control strategy #1):
16
(same as for category 2 Moore, section 10.2)
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//FSM state register:
19
(same as for category 2 Moore, section 10.2)
20
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//FSM combinational logic:
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always_comb
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case (pr_state)
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A:
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if (... and t>=T1-1) begin
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outp1 <= <value>;
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outp2 <= <value>;
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...
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nx_state <= B;
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end
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else if (... and t>=T2-1) begin
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outp1 <= <value>;
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outp2 <= <value>;
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...
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nx_state <= ...;
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end
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else begin
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outp1 <= <value>;
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outp2 <= <value>;
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...
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nx_state <= A;
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end
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B:
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if (... and t>=T3-1) begin
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outp1 <= <value>;
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outp2 <= <value>;
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...
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nx_state <= C;
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end
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else if (condition) begin
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outp1 <= <value>;
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outp2 <= <value>;
