Hardware Reference
In-Depth Information
53
...
54
nx_state <= ...;
55
end
56
else begin
57
outp1 <= <value>;
58
outp2 <= <value>;
59
...
60
nx_state <= B;
61
end
62
C: ...
63
...
64
endcase
65
66
//Optional output register:
67
(same as for category 2 Moore, section 10.2)
68
69 endmodule
70 //-------------------------------------------------
10.4 Design of a Light Rotator
This section presents a SystemVerilog-based design for the light rotator introduced in
section 8.11.2. The Moore template of section 10.2 is used to implement the FSM of
i gure 8.14b. Either strategy #1 (section 8.5.2) or #2 (section 8.5.3) can be used to build
the timer (both templates are shown in section 10.2); the former is employed in the
code below, while the latter is explored in exercise 10.1.
The i rst part of the code ( module header ) is in lines 1-4. The module's name is
light_rotator . Note that all ports are of type logic .
The second part of the code ( declarations ) is in lines 6-17. In the FSM-related dec-
larations (lines 9-11), the enumerated type state is created to represent the machine's
present and next states. In the timer-related declarations (lines 14-17), the values
chosen for T 1 and T 2 are such that 120 ms and 35 ms result, respectively, assuming
f clk = 50 MHz.
The third and i nal part of the code ( statements ) is in lines 19-85. It contains three
always blocks, described next.
The i rst always block (lines 22-27) is an always_ff that implements the timer,
using strategy #1. Except for the presence of stp , it is exactly as in the template.
The second always block (lines 30-32) is an always_ff that implements the FSM's
state register, exactly as in the template.
The third and i nal always block (lines 35-83) is an always_comb , which imple-
ments the entire combinational logic section. It is just a list of all states (indeed,
because this code is repetitive, some of the states were not detailed in order to save
some space), each containing the output ( ssd ) value and the next state. Note that in
each state the output value is unique because in a Moore machine the output depends
only on the state in which the machine is.
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