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setup. It is important to mention, however, that support for these attributes varies
among synthesis compilers. For example, Altera's Quartus II has full support for
enum_encoding , so both examples below are i ne (where “sequential” can also be “one-
hot”, “gray”, and so on):
attribute enum_encoding: string;
attribute enum_encoding of state: type is "sequential";
attribute enum_encoding: string;
attribute enum_encoding of state: type is "001 100 101"; --user defined
Xilinx's XST (from the ISE suite), on the other hand, only supports enum_encoding
for user-dei ned encoding; for the others (“sequential”, “one-hot”, etc.), fsm_encoding
can be used. Two valid examples are shown below:
attribute enum_encoding: string;
attribute enum_encoding of state: type is "001 100 101";
attribute fsm_encoding: string;
attribute fsm_encoding of pr_state: signal is "sequential";
6.4 Template Variations
The template of section 6.3 can be modii ed in several ways with little or no effect on
the i nal result. Some options are described below. These modii cations are extensible
to the Mealy template treated in the next section.
6.4.1 Combinational Logic Separated into Two Processes
A variation sometimes helpful from a didactic point of view is to separate the FSM
combinational logic process into two processes: one for the output, another for the
next state. Below, the process for the output logic is in lines 33-47, and that for the
next state logic is in lines 50-69.
32 --FSM combinational logic for output:
33 process (all)
34 begin
35
case pr_state is
36
when A =>
37
output1 <= <value>;
38
output2 <= <value>;
39
...
40
when B =>
41
output1 <= <value>;
42
output2 <= <value>;
43
...
44
when C =>
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