Hardware Reference
In-Depth Information
The utility of this improved CMOS CCII architecture was demonstrated by
successfully devising a band pass filter and a current controlled oscillator, tunable
in high frequency ranges: of 1.22-1.56 GHz and 290-475 MHz respectively.
4.11 Current Conveyor with High Current Driving
Capability, Operated from 1.5 V Power Supply
A CMOS CCII+ implementation with rail-to-rail input-output operation and high
deriving capability was proposed by Mita et al. in [
38
] and is shown here in
Fig.
4.11
. This circuit is based upon three main blocks which are: a transcon-
ductance amplifier with a differential input and two matched inverting transcon-
ductance output stages with their inputs connected in parallel. The output of one of
the inverting transconductance is fed back to non-inverting terminal of the input
transconductance thereby creating a unity voltage gain between terminals Y and X
of the current conveyor. In the schematic of Fig.
4.11
, the first transconductance
block is constructed from two complimentary differential amplifiers made from the
MOSFETs M
1
-M
2
and a PMOS current mirror (shown symbolically) and MOSFET
pair M
5
-M
6
and two NMOS mirrors (shown symbolically) along with the DC bias
current sources I
B1
and I
B2
. It is this part of the circuit which ensures rail-to-rail
capability. The MOSFET M
5
is configured as a common source amplifier and the
transistors M
6
,M
7
,M
8
,M
11
and M
16
setup the quiescent current and help in
properly deriving the two output transconductance stages which are based upon a
topology proposed by Palumbo [
67
]. The MOSFETs M
6
-M
7
and M
11
, forming the
current mirror, provide the signal inversion required for the Miller compensation
which is implemented through a compensating resistor R
c
and compensating
+V
DD
C
0
R
0
I
B4
M
14
M
15
I
B2
M
17
M
18
M
16
M
5
I
B3
M
3
M
4
Y
Z
M
13
M
12
M
2
M
1
X
M
7
M
6
M
10
M
11
M
9
M
8
I
B1
−V
SS
Fig. 4.11 1.5 V CC with high current driving capability devised by Mita et al. [
38
]
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