Hardware Reference
In-Depth Information
Fig. 14.7 Realization of
the grounded inductor
employing MICCII- [
19
]
I
in
V
in
x
Y
1
MICCII
−
z
y
Y
2
Z
in
Y
3
denote the positive (MICCII+) and negative (MICCII-) respectively. The expres-
sion for the input admittance of the circuit of Fig.
14.7
(assuming ideal MICCII-) is
given by:
I
in
V
in
¼
y
1
y
3
y
3
2
Y
in
¼
2
y
2
þ
y
1
ð
14
:
11
Þ
In the above equation, if we select y
1
¼
sC
, the circuit of
Fig.
14.7
would simulate a grounded inductance (L
eq
) of value CR
2
. Hence, a
lossless grounded inductor employing a minimum number of passive and active
elements is achieved.
Taking into account the non-idealities of the MICCII-, the non-ideal expression
for the input admittance is derived as:
1/R, y
3
¼
2/R and
y
2
¼
ð
2
ʱ
1
Þ
2
ʱ þ
2
ʱʲ ʲ
3
Y
in
¼
ʱʲ
þ
ð
14
:
12
Þ
sCR
2
2
R
ʱʲ
Thus, the circuit realizes an inductor (L
eq
) in parallel with a resistor (R
eq
) whose
values are given by the following expressions:
CR
2
ʱʲ
2
R
ʱʲ
L
eq
¼
and
R
eq
¼
ð
14
:
13
Þ
ð
2
ʱ
1
Þ
ð
2
ʱ þ
2
ʱʲ ʲ
3
Þ
It may be pointed out that the parameter
of the MICCII- can be changed by
varying the bias voltages of the MICCII-(as shown in Fig.
14.8
). Thus, assuming
ʲ
¼
ʱ
1 and
ʱ
as a variable, five different categories of inductors can be realized:
(i) for
ʱ >
1, a parallel combination of lossless inductor with positive resistance
(ii) for
ʱ
¼
1, a lossless inductor (iii) for 0.5
<ʱ <
1, a parallel combination of
lossless inductor with negative resistance (iv) for 0
0.5, a parallel combina-
tion of negative inductor with a negative resistance and (v) for
<ʱ<
0, a parallel
combination of lossless inductor with a positive resistance employing MICCII + .
ʱ<
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