References - Computer Architecture: A Quantitative Approach - page 721

399. McNairy C, Soltis D. Itanium 2 processor microarchitecture. IEEE Micro . 2003;23(2):44-55
(March-April).
400. Mead C, Conway L. Introduction to VLSI Systems Reading, Mass: Addison-Wesley; 1980.
401. Mellor-Crummey JM, Scot ML. Algorithms for scalable synchronization on shared-
memory multiprocessors. ACM Trans on Computer Systems . 1991;9(1):21-65 (February).
402. Menabrea LF. Sketch of the analytical engine invented by Charles Babbage. Bibliothèque
Universelle de Genève . 1842;82 (October).
403. Menon A, Renato Santos J, Turner Y, Janakiraman G, Zwaenepoel W. Diagnosing perform-
ance overheads in the xen virtual machine environment. Proc First ACM/USENIX Int'l Conf
on Virtual Execution Environments 2005;13-23.
404. Merlin PM, Schweizer PJ. Deadlock avoidance in store-and-forward networks Part I Store-
and-forward deadlock. IEEE Trans on Communications . 1980;COM-28(3):345-354 (March).
405. Metcalfe RM. Computer/network interface design: Lessons from Arpanet and Ethernet.
IEEE J on Selected Areas in Communications . 1993;11(2):173-180 (February).
406. Metcalfe RM, Boggs DR. Ethernet: Distributed packet switching for local computer net-
works. Communications of the ACM . 1976;19(7):395-404 (July).
407. Metropolis N, Howlet J, Rota GC, eds. A History of Computing in the Twentieth Century . New
York: Academic Press; 1980.
408. Meyer RA, Seawright LH. A virtual machine time sharing system. IBM Systems J.
1970;9(3):199-218.
409. Meyers GJ. The evaluation of expressions in a storage-to-storage architecture. Computer Ar-
chitecture News . 1978;7(3):20-23 (October).
410. Meyers GJ. Advances in Computer Architecture 2nd ed. New York: Wiley; 1982.
411. Micron. Calculating Memory System Power for DDR2. In: htp://download.micron.com/pdf/
pubs/designline/dl1Q04.pdf ; 2004.
412. Micron. The Micron ® System-Power Calculator. In: htp://www.micron.com/systemcalc ; 2006.
413. MIPS. MIPS16 Application Specific Extension Product Description. In: www.sgi.com/MIPS/
arch/MIPS16/mips16.pdf ; 1997.
414. Miranker GS, Rubenstein J, Sanguineti J. Squeezing a Cray-class supercomputer into a
single-user package. Proc IEEE COMPCON 1988;452-456.
415. Mitchell D. The Transputer: The time is now. Computer Design (RISC suppl.) 1989;40-41.
416. Mitsubishi. Mitsubishi 32-Bit Single Chip Microcomputer M32R Family Software Manual
Cypress, Calif: Mitsubishi; 1996.
417. Miura K, Uchida K. FACOM vector processing system: VP100/200. Proc NATO Advanced
Research Workshop on High-Speed Computing 1983; Also appears in In: Hwang K, ed. Super-
processors: Design and applications . 1983;59-73. IEEE (August 1984).
418. Miya EN. Multiprocessor/distributed processing bibliography. Computer Architecture News .
1985;13(1):27-29.
419. Montoye RK, Hokenek E, Runyon SL. Design of the IBM RISC System/6000 loating-point
execution. IBM J Research and Development . 1990;34(1):59-70.
420. Moore B, Padegs A, Smith R, Bucholz W. Concepts of the System/370 vector architecture.
14th Annual Int'l Symposium on Computer Architecture (ISCA) 1987;282-292.

421. Moore GE. Cramming more components onto integrated circuits. Electronics .

1965;38(8):114-117 (April 19).
422. Morse S, Ravenal B, Mazor S, Pohlman W. Intel microprocessors—8080 to 8086. Computer .
1980;13 (October).
423. Moshovos A, Sohi GS. Streamlining inter-operation memory communication via data de-
pendence prediction. Proc 30th Annual Int'l Symposium on Microarchitecture 1997;235-245.