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424. Moshovos A, Breach S, Vijaykumar TN, Sohi GS. Dynamic speculation and synchroniza-
tion of data dependences. 24th Annual Int'l Symposium on Computer Architecture (ISCA) 1997.
425. Moussouris J, Crudele L, Freitas D, et al. A CMOS RISC processor with integrated system
functions. Proc IEEE COMPCON 1986;191.
426. Mowry TC, Lam S, Gupta A. Design and evaluation of a compiler algorithm for prefetch-
ing. Proc Fifth Int'l Conf on Architectural Support for Programming Languages and Operating
Systems (ASPLOS) 1992;62-73.
427. MSN Money. Amazon Shares Tumble after Rally Fizzles. In: htp://moneycentral.msn.com/
content/CNBCTV/Articles/Dispatches/P133695.asp ; 2005.
428. Muchnick SS. Optimizing compilers for SPARC. Sun Technology . 1988;1(3):64-77 (Summer).
429. Mueller M, Alves LC, Fischer W, Fair ML, Modi I. RAS strategy for IBM S/390 G5 and G6.
IBM J Research and Development . 1999;43(5-6):875-888 (September-November).
430. Mukherjee SS, Weaver C, Emer JS, Reinhardt SK, Austin TM. Measuring architectural vul-
nerability factors. IEEE Micro . 2003;23(6):70-75.
431. Murphy B, Gent T. Measuring system and software reliability using an automated data col-
lection process. Quality and Reliability Engineering International . 1995;11(5):341-353 (Septem-
ber-October).
432. Myer TH, Sutherland IE. On the design of display processors. Communications of the ACM .
1968;11(6):410-414 (June).
433. Narayanan D, Thereska E, Donnelly A, Elnikety S, Rowstron A. Migrating server storage
to SSDs: Analysis of trade-offs. Proc 4th ACM European Conf on Computer Systems 2009.
434. National Research Council. The Evolution of Untethered Communications, Computer
Science and Telecommunications Board Washington, D.C.: National Academy Press; 1997.
435. National Storage Industry Consortium. Tape Roadmap. In: www.nsic.org ; 1998.
436. Nelson VP. Fault-tolerant computing: Fundamental concepts. Computer . 1990;23(7):19-25
(July).
437. Ngai T-F, Irwin MJ. Regular, area-time efficient carry-lookahead adders. Proc Seventh IEEE
Symposium on Computer Arithmetic 1985;9-15.
438. Nicolau A, Fisher JA. Measuring the parallelism available for very long instruction word
architectures. IEEE Trans on Computers . 1984;C-33(11):968-976 (November).
439. Nikhil RS, Papadopoulos GM, Arvind. *T: A multithreaded massively parallel architecture.
Proc 19th Annual Int'l Symposium on Computer Architecture (ISCA) 1992;156-167.
440. Noordergraaf L, van der Pas R. Performance experiences on Sun's WildFire prototype. Proc
ACM/IEEE Conf on Supercomputing 1999.
441. Nyberg CR, Barclay T, Cvetanovic Z, Gray J, Lomet D. AlphaSort: A RISC machine sort.
Proc ACM SIGMOD 1994.
442. Oka M, Suzuoki M. Designing and programming the emotion engine. IEEE Micro .
1999;19(6):20-28 (November-December).
443. Okada S, Okada S, Matsuda Y, Yamada T, Kobayashi A. System on a chip for digital still
camera. IEEE Trans on Consumer Electronics . 1999;45(3):584-590 (August).
444. Oliker L, Canning A, Carter J, Shalf J, Ethier S. Scientific computations on modern parallel
vector systems. Proc ACM/IEEE Conf on Supercomputing 2004;10.
445. Pabst T. Performance Showdown at 133 MHz FSB—The Best Platform for Coppermine. In:
www6.tomshardware.com/mainboard/00q1/000302/ ; 2000.
446. Padua D, Wolfe M. Advanced compiler optimizations for supercomputers. Communications
of the ACM . 1986;29(12):1184-1201 (December).
447. Palacharla S, Kessler RE. Evaluating stream buffers as a secondary cache replacement. Proc
21st Annual Int'l Symposium on Computer Architecture (ISCA) 1994;24-33.
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