Pipelining: Basic and Intermediate Concepts - Computer Architecture: A Quantitative Approach - page 627

If there are no pipeline stalls, this leads to the intuitive result that pipelining can improve
performance by the depth of the pipeline.
Alternatively, if we think of pipelining as improving the clock cycle time, then we can as-
sume that the CPI of the unpipelined processor, as well as that of the pipelined processor, is 1.
This leads to
In cases where the pipe stages are perfectly balanced and there is no overhead, the clock
cycle on the pipelined processor is smaller than the clock cycle of the unpipelined processor
by a factor equal to the pipelined depth:
This leads to the following:
Thus, if there are no stalls, the speedup is equal to the number of pipeline stages, matching
our intuition for the ideal case.
Structural Hazards
When a processor is pipelined, the overlapped execution of instructions requires pipelining of
functional units and duplication of resources to allow all possible combinations of instructions
in the pipeline. If some combination of instructions cannot be accommodated because of re-
source conflicts, the processor is said to have a structural hazard .
The most common instances of structural hazards arise when some functional unit is not
fully pipelined. Then a sequence of instructions using that unpipelined unit cannot proceed at
the rate of one per clock cycle. Another common way that structural hazards appear is when
some resource has not been duplicated enough to allow all combinations of instructions in the
pipeline to execute. For example, a processor may have only one register-file write port, but