Review of Memory Hierarchy - Computer Architecture: A Quantitative Approach - page 597

ation . Assuming that each process has three primary segments (text, heap, and stack), the av-
erage wasted storage per process will be 1.5 times the page size. This amount is negligible for
computers with hundreds of megabytes of memory and page sizes of 4 KB to 8 KB. Of course,
when the page sizes become very large (more than 32 KB), storage (both main and secondary)
could be wasted, as well as I/O bandwidth. A final concern is process start-up time; many pro-
cesses are small, so a large page size would lengthen the time to invoke a process.
Summary Of Virtual Memory And Caches
With virtual memory, TLBs, first-level caches, and second-level caches all mapping portions
of the virtual and physical address space, it can get confusing what bits go where. Figure B.25
gives a hypothetical example going from a 64-bit virtual address to a 41-bit physical address
with two levels of cache. This L1 cache is virtually indexed, physically tagged since both the
cache size and the page size are 8 KB. The L2 cache is 4 MB. The block size for both is 64 bytes.