Instruction-Level Parallelism and Its Exploitation - Computer Architecture: A Quantitative Approach - page 198

FIGURE 3.20 The time of issue, execution, and writing result for a dual-
issue version of our pipeline with speculation . Note that the LD following the
BNE can start execution early because it is speculative.
This example clearly shows how speculation can be advantageous when there are data-
dependent branches, which otherwise would limit performance. This advantage depends,
however, on accurate branch prediction. Incorrect speculation does not improve performance;
in fact, it typically harms performance and, as we shall see, dramatically lowers energy ei-
ciency.
3.9 Advanced Techniques for Instruction Delivery and
Speculation
In a high-performance pipeline, especially one with multiple issues, predicting branches well
is not enough; we actually have to be able to deliver a high-bandwidth instruction stream.
In recent multiple-issue processors, this has meant delivering 4 to 8 instructions every clock
cycle. We look at methods for increasing instruction delivery bandwidth first. We then turn
to a set of key issues in implementing advanced speculation techniques, including the use of
register renaming versus reorder buffers, the aggressiveness of speculation, and a technique
called value prediction , which atempts to predict the result of a computation and which could
further enhance ILP.